It was intended to replace 286/386 and mainframes. I know: talk about shooting for the stars. Yet, manual shows it to be a brilliant design [vs i432 APX] that was basically an object-oriented, efficient RISC with error recovery, concurrency, and lock-step added. Just a few, small modifications to make this into a highly-secure, three-or-four-9's CPU. Might be Intel's best work in terms of engineering tradeoffs. Worth somebody imitating imho far as hobbyist clones or RISC-V projects go.
"The i960 looks pretty interesting, but it appears that they aren't manufactured anymore. Is there something roughly equivalent out there?"
No. Closest thing in development with open code that I know about is Cambridge's CHERI processor that combines MIPS, capability-security, legacy compatibility, and FreeBSD. It's not exactly simple but it does some of things i960 intended.
"what is the state of the art in microprocessors for embedded systems and the like?"
I only know stuff in that space that crosses into my research into high reliability, security, or subversion-resistance. Studying more MCU's for last one given gotta use old nodes. Found a few interesting things, though.
Plasma is a MIPS CPU & SOC in around 4,000 lines of HDL. Already has RTOS and stuff. PULPino is like a RISC-V version of Arduino with 32-bit core & lots of peripheral stuff. Some MCU's, no link on hand, are including I/O coprocessors that give some of benefits Channel I/O and server offloaders have. Another strategy is including HW accelerators for common, high-CPU (or I/O) functions. Outside C & serial, JOP is small, efficient CPU for Java code. Sandia's SSP is similar but highly-assured & rad-hard. AAMP7G is most reliable/secure in embedded with low-power, decent speed, triplicated circuits, mathematical verification, separation kernel, & easy ISA. I'm keeping an eye out for others that include things like DSP's or parallel architectures that aren't just toys. All I'm seeing so far that are being fabbed or used on FPGA's.
It's another old one from my collection. Links to two implementations by modern hobbyists showing it can be done. Not sure if the architecture is worth reviving for education, experimentation or high-reliability but it paid off then esp on SOI processes. Included a stand-by mode, too, despite being 1970's chip. Intersil also still sells them for government or commercial clients for legacy systems presumably.
The 6809 (direct page, anywhere in memory) and the 6502 (zero page) allowed quick addressing of 256 bytes using just an 8 bit address. This handily outperformed the 1802's 16 word register file because effectively that gave the other two a large number of registers (with about the same code density).
I do remember the 1802, there were some interesting hobby projects around it but I never built anything with it. The DMA controller looks interesting, I'm not aware of any other 8 bit CPU that had one.
